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Integrated circuits
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Standard logic
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74LS series
Name:
74LS114
Short description:
Dual JK negative-edge-triggered flip-flops with preset, common clear and common clock
Symbol:
Pinout:
Default
Style:
GOST
Variant:
Variant 1
PDIP-14N (JEDEC MS-001, Variation AA)
Vendor
Part number / Specifications
Texas Instruments
SN74LS114A
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