Online electronic circuit diagram editor
Try demo mode
Main page
Manual
Components
Community
Category:
Integrated circuits
/
Standard logic
/
74LS series
Name:
74LS113
Short description:
Dual J-K negative-edge-triggered flip-flop with preset
Symbol:
Pinout:
Default
Style:
GOST
Variant:
Variant 1
PDIP-14N (JEDEC MS-001, Variation AA)
Vendor
Part number / Specifications
Texas Instruments
SN74LS113AN
© 2010, 2011, 2012 ASVCorp.